This course considers algorithmic state machines in digital arithmetic and functions utilizing the Verilog Hardware Description Language. The lecture material is supplemented by example projects and assignments using the student edition of Silos 2001(or Silos 2003) by Simucad (www.simucad.com). The course consists of unannounced Quizes and five assigned Projects of incrementally increasing complexity. The final project also gives hand on experience with the FPGA boards and Warp, synthesis tool from Cypress Semiconductors. This course material continues in the post baccalaureate courses EE 502 Computer Engineering, EE 602 Advance Computer Engineering and EE 680 Computer Architecture.
The course text is M.D.Ciletti, Advanced Digital Design with the Verilog-HDL, Prentice Hall, 2003 (ISBN 0-13-089161-4)